
malloc2:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400570 <_init>:
  400570:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400574:	910003fd 	mov	x29, sp
  400578:	94000040 	bl	400678 <call_weak_fn>
  40057c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400580:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400590 <.plt>:
  400590:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400594:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf6e0>
  400598:	f947fe11 	ldr	x17, [x16, #4088]
  40059c:	913fe210 	add	x16, x16, #0xff8
  4005a0:	d61f0220 	br	x17
  4005a4:	d503201f 	nop
  4005a8:	d503201f 	nop
  4005ac:	d503201f 	nop

00000000004005b0 <memcpy@plt>:
  4005b0:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  4005b4:	f9400211 	ldr	x17, [x16]
  4005b8:	91000210 	add	x16, x16, #0x0
  4005bc:	d61f0220 	br	x17

00000000004005c0 <malloc@plt>:
  4005c0:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  4005c4:	f9400611 	ldr	x17, [x16, #8]
  4005c8:	91002210 	add	x16, x16, #0x8
  4005cc:	d61f0220 	br	x17

00000000004005d0 <__libc_start_main@plt>:
  4005d0:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  4005d4:	f9400a11 	ldr	x17, [x16, #16]
  4005d8:	91004210 	add	x16, x16, #0x10
  4005dc:	d61f0220 	br	x17

00000000004005e0 <__gmon_start__@plt>:
  4005e0:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  4005e4:	f9400e11 	ldr	x17, [x16, #24]
  4005e8:	91006210 	add	x16, x16, #0x18
  4005ec:	d61f0220 	br	x17

00000000004005f0 <abort@plt>:
  4005f0:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  4005f4:	f9401211 	ldr	x17, [x16, #32]
  4005f8:	91008210 	add	x16, x16, #0x20
  4005fc:	d61f0220 	br	x17

0000000000400600 <puts@plt>:
  400600:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  400604:	f9401611 	ldr	x17, [x16, #40]
  400608:	9100a210 	add	x16, x16, #0x28
  40060c:	d61f0220 	br	x17

0000000000400610 <free@plt>:
  400610:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  400614:	f9401a11 	ldr	x17, [x16, #48]
  400618:	9100c210 	add	x16, x16, #0x30
  40061c:	d61f0220 	br	x17

0000000000400620 <printf@plt>:
  400620:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  400624:	f9401e11 	ldr	x17, [x16, #56]
  400628:	9100e210 	add	x16, x16, #0x38
  40062c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400630 <_start>:
  400630:	d280001d 	mov	x29, #0x0                   	// #0
  400634:	d280001e 	mov	x30, #0x0                   	// #0
  400638:	aa0003e5 	mov	x5, x0
  40063c:	f94003e1 	ldr	x1, [sp]
  400640:	910023e2 	add	x2, sp, #0x8
  400644:	910003e6 	mov	x6, sp
  400648:	580000c0 	ldr	x0, 400660 <_start+0x30>
  40064c:	580000e3 	ldr	x3, 400668 <_start+0x38>
  400650:	58000104 	ldr	x4, 400670 <_start+0x40>
  400654:	97ffffdf 	bl	4005d0 <__libc_start_main@plt>
  400658:	97ffffe6 	bl	4005f0 <abort@plt>
  40065c:	00000000 	.inst	0x00000000 ; undefined
  400660:	004007c4 	.word	0x004007c4
  400664:	00000000 	.word	0x00000000
  400668:	00400858 	.word	0x00400858
  40066c:	00000000 	.word	0x00000000
  400670:	004008d8 	.word	0x004008d8
  400674:	00000000 	.word	0x00000000

0000000000400678 <call_weak_fn>:
  400678:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf6e0>
  40067c:	f947f000 	ldr	x0, [x0, #4064]
  400680:	b4000040 	cbz	x0, 400688 <call_weak_fn+0x10>
  400684:	17ffffd7 	b	4005e0 <__gmon_start__@plt>
  400688:	d65f03c0 	ret
  40068c:	00000000 	.inst	0x00000000 ; undefined

0000000000400690 <deregister_tm_clones>:
  400690:	b0000080 	adrp	x0, 411000 <memcpy@GLIBC_2.17>
  400694:	91014000 	add	x0, x0, #0x50
  400698:	b0000081 	adrp	x1, 411000 <memcpy@GLIBC_2.17>
  40069c:	91014021 	add	x1, x1, #0x50
  4006a0:	eb00003f 	cmp	x1, x0
  4006a4:	540000a0 	b.eq	4006b8 <deregister_tm_clones+0x28>  // b.none
  4006a8:	90000001 	adrp	x1, 400000 <_init-0x570>
  4006ac:	f9447c21 	ldr	x1, [x1, #2296]
  4006b0:	b4000041 	cbz	x1, 4006b8 <deregister_tm_clones+0x28>
  4006b4:	d61f0020 	br	x1
  4006b8:	d65f03c0 	ret
  4006bc:	d503201f 	nop

00000000004006c0 <register_tm_clones>:
  4006c0:	b0000080 	adrp	x0, 411000 <memcpy@GLIBC_2.17>
  4006c4:	91014000 	add	x0, x0, #0x50
  4006c8:	b0000081 	adrp	x1, 411000 <memcpy@GLIBC_2.17>
  4006cc:	91014021 	add	x1, x1, #0x50
  4006d0:	cb000021 	sub	x1, x1, x0
  4006d4:	9343fc21 	asr	x1, x1, #3
  4006d8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4006dc:	9341fc21 	asr	x1, x1, #1
  4006e0:	b40000a1 	cbz	x1, 4006f4 <register_tm_clones+0x34>
  4006e4:	90000002 	adrp	x2, 400000 <_init-0x570>
  4006e8:	f9448042 	ldr	x2, [x2, #2304]
  4006ec:	b4000042 	cbz	x2, 4006f4 <register_tm_clones+0x34>
  4006f0:	d61f0040 	br	x2
  4006f4:	d65f03c0 	ret

00000000004006f8 <__do_global_dtors_aux>:
  4006f8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4006fc:	910003fd 	mov	x29, sp
  400700:	f9000bf3 	str	x19, [sp, #16]
  400704:	b0000093 	adrp	x19, 411000 <memcpy@GLIBC_2.17>
  400708:	39414260 	ldrb	w0, [x19, #80]
  40070c:	35000080 	cbnz	w0, 40071c <__do_global_dtors_aux+0x24>
  400710:	97ffffe0 	bl	400690 <deregister_tm_clones>
  400714:	52800020 	mov	w0, #0x1                   	// #1
  400718:	39014260 	strb	w0, [x19, #80]
  40071c:	f9400bf3 	ldr	x19, [sp, #16]
  400720:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400724:	d65f03c0 	ret

0000000000400728 <frame_dummy>:
  400728:	17ffffe6 	b	4006c0 <register_tm_clones>

000000000040072c <stu_create>:
  40072c:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400730:	910003fd 	mov	x29, sp
  400734:	f9000fa0 	str	x0, [x29, #24]
  400738:	b90017a1 	str	w1, [x29, #20]
  40073c:	b90013a2 	str	w2, [x29, #16]
  400740:	d2800200 	mov	x0, #0x10                  	// #16
  400744:	97ffff9f 	bl	4005c0 <malloc@plt>
  400748:	f90017a0 	str	x0, [x29, #40]
  40074c:	b98017a0 	ldrsw	x0, [x29, #20]
  400750:	97ffff9c 	bl	4005c0 <malloc@plt>
  400754:	aa0003e1 	mov	x1, x0
  400758:	f94017a0 	ldr	x0, [x29, #40]
  40075c:	f9000001 	str	x1, [x0]
  400760:	f94017a0 	ldr	x0, [x29, #40]
  400764:	f9400000 	ldr	x0, [x0]
  400768:	b98017a1 	ldrsw	x1, [x29, #20]
  40076c:	aa0103e2 	mov	x2, x1
  400770:	f9400fa1 	ldr	x1, [x29, #24]
  400774:	97ffff8f 	bl	4005b0 <memcpy@plt>
  400778:	f94017a0 	ldr	x0, [x29, #40]
  40077c:	b94013a1 	ldr	w1, [x29, #16]
  400780:	b9000801 	str	w1, [x0, #8]
  400784:	f94017a0 	ldr	x0, [x29, #40]
  400788:	f9400001 	ldr	x1, [x0]
  40078c:	90000000 	adrp	x0, 400000 <_init-0x570>
  400790:	91242000 	add	x0, x0, #0x908
  400794:	97ffffa3 	bl	400620 <printf@plt>
  400798:	f94017a0 	ldr	x0, [x29, #40]
  40079c:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4007a0:	d65f03c0 	ret

00000000004007a4 <stu_release>:
  4007a4:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4007a8:	910003fd 	mov	x29, sp
  4007ac:	f9000fa0 	str	x0, [x29, #24]
  4007b0:	f9400fa0 	ldr	x0, [x29, #24]
  4007b4:	97ffff97 	bl	400610 <free@plt>
  4007b8:	d503201f 	nop
  4007bc:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4007c0:	d65f03c0 	ret

00000000004007c4 <main>:
  4007c4:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  4007c8:	910003fd 	mov	x29, sp
  4007cc:	90000000 	adrp	x0, 400000 <_init-0x570>
  4007d0:	91244000 	add	x0, x0, #0x910
  4007d4:	f90017a0 	str	x0, [x29, #40]
  4007d8:	52800142 	mov	w2, #0xa                   	// #10
  4007dc:	52800061 	mov	w1, #0x3                   	// #3
  4007e0:	f94017a0 	ldr	x0, [x29, #40]
  4007e4:	97ffffd2 	bl	40072c <stu_create>
  4007e8:	f90013a0 	str	x0, [x29, #32]
  4007ec:	f94013a0 	ldr	x0, [x29, #32]
  4007f0:	f9400000 	ldr	x0, [x0]
  4007f4:	f9000fa0 	str	x0, [x29, #24]
  4007f8:	f94013a0 	ldr	x0, [x29, #32]
  4007fc:	f9400001 	ldr	x1, [x0]
  400800:	f94013a0 	ldr	x0, [x29, #32]
  400804:	b9400802 	ldr	w2, [x0, #8]
  400808:	90000000 	adrp	x0, 400000 <_init-0x570>
  40080c:	91246000 	add	x0, x0, #0x918
  400810:	97ffff84 	bl	400620 <printf@plt>
  400814:	90000000 	adrp	x0, 400000 <_init-0x570>
  400818:	91242000 	add	x0, x0, #0x908
  40081c:	f94017a1 	ldr	x1, [x29, #40]
  400820:	97ffff80 	bl	400620 <printf@plt>
  400824:	f94013a0 	ldr	x0, [x29, #32]
  400828:	f9400001 	ldr	x1, [x0]
  40082c:	90000000 	adrp	x0, 400000 <_init-0x570>
  400830:	91242000 	add	x0, x0, #0x908
  400834:	97ffff7b 	bl	400620 <printf@plt>
  400838:	f94013a0 	ldr	x0, [x29, #32]
  40083c:	97ffffda 	bl	4007a4 <stu_release>
  400840:	f90013bf 	str	xzr, [x29, #32]
  400844:	f9400fa0 	ldr	x0, [x29, #24]
  400848:	97ffff6e 	bl	400600 <puts@plt>
  40084c:	52800000 	mov	w0, #0x0                   	// #0
  400850:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400854:	d65f03c0 	ret

0000000000400858 <__libc_csu_init>:
  400858:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  40085c:	910003fd 	mov	x29, sp
  400860:	a901d7f4 	stp	x20, x21, [sp, #24]
  400864:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf6e0>
  400868:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf6e0>
  40086c:	91374294 	add	x20, x20, #0xdd0
  400870:	913722b5 	add	x21, x21, #0xdc8
  400874:	a902dff6 	stp	x22, x23, [sp, #40]
  400878:	cb150294 	sub	x20, x20, x21
  40087c:	f9001ff8 	str	x24, [sp, #56]
  400880:	2a0003f6 	mov	w22, w0
  400884:	aa0103f7 	mov	x23, x1
  400888:	9343fe94 	asr	x20, x20, #3
  40088c:	aa0203f8 	mov	x24, x2
  400890:	97ffff38 	bl	400570 <_init>
  400894:	b4000194 	cbz	x20, 4008c4 <__libc_csu_init+0x6c>
  400898:	f9000bb3 	str	x19, [x29, #16]
  40089c:	d2800013 	mov	x19, #0x0                   	// #0
  4008a0:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  4008a4:	aa1803e2 	mov	x2, x24
  4008a8:	aa1703e1 	mov	x1, x23
  4008ac:	2a1603e0 	mov	w0, w22
  4008b0:	91000673 	add	x19, x19, #0x1
  4008b4:	d63f0060 	blr	x3
  4008b8:	eb13029f 	cmp	x20, x19
  4008bc:	54ffff21 	b.ne	4008a0 <__libc_csu_init+0x48>  // b.any
  4008c0:	f9400bb3 	ldr	x19, [x29, #16]
  4008c4:	a941d7f4 	ldp	x20, x21, [sp, #24]
  4008c8:	a942dff6 	ldp	x22, x23, [sp, #40]
  4008cc:	f9401ff8 	ldr	x24, [sp, #56]
  4008d0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  4008d4:	d65f03c0 	ret

00000000004008d8 <__libc_csu_fini>:
  4008d8:	d65f03c0 	ret

Disassembly of section .fini:

00000000004008dc <_fini>:
  4008dc:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4008e0:	910003fd 	mov	x29, sp
  4008e4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4008e8:	d65f03c0 	ret
